![]() Circuit simulation to determine whether new designs of LSI meet performance requirements is essential. Use of the tunnel FETs is expected to reduce the power consumption of LSIs. In recent years, attention has been focused on tunnel FETs, which is capable of steep on/off switching at low voltage, as an alternative to the conventional MOSFETs. Breakthrough, revolutionary low-power large-scale integrated circuits (LSIs) are required to build a low-carbon society. However, reduction in the power consumption of conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) is reaching its limit. There has also been growing social demand for reduction in the power consumption of electronic information devices. In recent years, with the wide spread of mobile information devices and the increasing sophistication of IT equipment, there has been growing concern about increasing power consumption. (Figure) : Flow to the design of a large-scale integrated circuit using low-voltage tunnel FETsĪ circuit can be designed by using the device-operation model to represent the characteristics of developed devices. The model is expected to contribute to the design of tunnel FETs aiming at the realization of ultra-low-power circuits.ĭetails of this technology will be presented at the 2012 International Conference on Solid State Devices and Materials (SSDM 2012) to be held in Kyoto from September 25 to 27, 2012. It is described in Verilog-A language and therefore can be incorporated into existing major circuit simulators. This device-operation model simulates current-voltage characteristics by predicting the electric field distribution in a tunnel FET and estimating the tunnel current. Koichi Fukuda (Researcher) and others, Collaborative Research Team Green Nanoelectronics Center (Leader: Naoki Yokoyama), the Nanoelectronics Research Institute (Director: Seigo Kanemaru) of the National Institute of Advanced Industrial Science and Technology (AIST: President: Tamotsu Nomakuchi), have developed a compact model for circuit simulation to predict the circuit behavior of tunnel field-effect transistors (tunnel FETs).
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